Mr. Jayesh Diwan

Faculty Details

  • Designation : Assistant Professor
  • Qualification : M. Tech - EC (VLSI Design)
  • Experience : 4 Years
  • Area Of Interest : Digital VLSI Design

Educational Qualification

<style type="text/css"><!--td {border: 1px solid #ccc;}br {mso-data-placement:same-cell;}--></style>M. Tech in VLSI Design in 2009 from NIRMA University, CPI = 8.17 / 10.

B. E. E. C from VGEC, Chandkheda in 2006 with distinction

Work Experience

<style type="text/css"><!--td {border: 1px solid #ccc;}br {mso-data-placement:same-cell;}--></style>1. Assistant Professor - Indus University, from 07/02/2011 to 30/05/2017
2. Junior Telecom Operator - BSNL, from 10/05/2010 to 02/02/2011
3. Lecturer - LDRP Institute of Technology and Research, from 27/07/2009 to 30/04/2010

Skills and Knowledge

<style type="text/css"><!--td {border: 1px solid #ccc;}br {mso-data-placement:same-cell;}--></style>Digital VLSI Design, VLSI Signal Processing, VHDL - Verilog Programming

Courses Taught

<style type="text/css"><!--td {border: 1px solid #ccc;}br {mso-data-placement:same-cell;}--></style>UG level
1. Digital Electronics
2. Signals and Systems
3. Digital Signal Processing
4. VLSI Technology
5. Embedded Systems
6. Testing and Verification
7. Circuits and Networks
8. Control Theory
9. Communication System
10. Analog Electronics
11. Design Engineering

PG Level
1. Wavelet Transform Analysis
2. VLSI Test Principles and Architecture

Training and Workshop

<style type="text/css"><!--td {border: 1px solid #ccc;}br {mso-data-placement:same-cell;}--></style>Trainings taken
1. VC training on "Spectrum of Electronics and Communication Engineering and Emerging Technologies"

2. NITTTR Induction Phase 1 from 25/06/2018 to 06/07/2018 at Ahmedabad Extention centre


<style type="text/css"><!--td {border: 1px solid #ccc;}br {mso-data-placement:same-cell;}--></style>Institute/Head Office/University level additional portfolio (chronological order)
1. Job Placement
2. Alumni
3. Gate Club
4. Scholarship
5. Miscellaneous

Research Projects




Academic Projects


Patent Filed


Professional Institution Memberships


Expert Lectures

<style type="text/css"><!--td {border: 1px solid #ccc;}br {mso-data-placement:same-cell;}--></style>Expert lecture delivered on "Introduction to Hardware Description Language" at VC training of "Spectrum of Electronics and Communication Engineering and Emerging Technologies" at VGEC - Chandkheda on 17/04/2018