Dr. Alpesh M Patel
Ph.D. (Electronics & Communication), M.Tech. (Electronics & Communication), BE (Electronics & Communication),
Asst. Prof. (Electronics & Communication Department)
VLSI Design, VHDL Programing, Analog circuit design
Undergraduate (B. E. Electronics & Communication)
Induction
training program phase - I |
NTTTR
Extension Centre , Ahmedabad |
14-05-2012 |
25-05-2012 |
Nanoscale
Integration , Fabrication and
Characterization |
SVNIT
Surat |
21-10-2013 |
25-10-2013 |
Induction
training program phase - II |
NTTTR
Extension Centre , Ahmedabad |
03-02-2014 |
14-02-2014 |
The
Art of Compact Modeling |
IIT
Gandhinagar |
12-05-2014 |
21-05-2014 |
Digital
Logic Circuit Simulation Using VHDL |
NITTTR
Bhopal |
9/6/2014 |
13-06-2014 |
Applied
Digital Signal Processing |
IIT
Gandhinagar |
8/12/2014 |
12/12/2014 |
Recent
Development in VLSI and Image
Processing |
VGEC
Chandkheda |
18/05/2015 |
22/05/2015 |
Research
Methodology |
IIT
Gandhinagar |
27/10/2015 |
31/10/2015 |
Advance
in Nano Technology |
NTTTR
Extension Centre , Ahmedabad |
28-12-2015 |
1/1/2016 |
Managerial
Skill for Technical Teachers & Administrators |
NITTTR
Bhopal |
30-05-2016 |
10/6/2016 |
STTP
on "Basics of Mechatronics" |
LDCE,
Ahmedabad |
5/12/2016 |
9/12/2016 |
NITTTR
STTP on "LABVIEW Software" |
NITTTR
Bhopal |
1/5/2017 |
5/5/2017 |
Machine
Learning and its Application |
BVM
Engineering College Vallabhvidhyanagar |
18-12-2017 |
23-12-2017 |
Advance
Satellite Communication |
NITTTR
Bhopal |
14-05-2018 |
18-05-2018 |
1. 1ST Year Induction Programm
1. Kunjal
Parmar, Kirit Patel and Alpesh Patel. "Digital Controlled Oscillator of
ADPLL designs - A Review." International Journal of Advanced Engineering
and Research Development 2.2 (2015): 312-315. |
2. Kunjal Parmar, Kirit Patel and Alpesh Patel. "All Digital
Phase Locked Loop with High DCO resolution." International Journal of
Advanced Engineering and Research Development 2.5 (2015): 160-164. |
3. Bhoomi Ghetia and Alpesh Patel. "Realization of FPGA Based
Data Acquisition System Based on Soft Core Embedded Processor And Network
Module." International Journal for Scientific Research and Development
3.12 (2016): 590-592. |
4. Patel Niraj Gulabbhai and Alpesh Patel. "Design of 16 X 16
Vedic Multiplier." International Journal for Scientific Research and
Development 4.2 (2016): 1508-1510. |
5. Anurag Shankhdhar and Alpesh M. Patel. "Crosstalk Analysis
In Deep Submicron Vlsi Circuits" International Conference on Technology
& Management ICTM-2017, EC-082 to EC-085 |
6. Bhakti Poshiya, Praveenlal Eddapala and Alpesh Patel.
"Design and Development of DSC Based Signal Processing and Control
System for Plasma Disruption Mitigation" National Conference on Recent
Advances in Circuits, Communication, and Computing Technology- RACCCT 2017,
Page No 105-108 |
7. Mishu Devadasan and Alpesh M. Patel, "Methods for improved efficiency in dc-dc buck converter", International Research Journal of Engineering and Technology (IRJET), 5.4 (2018):2395-0056 |