<style type="text/css"><!--td {border: 1px solid #ccc;}br {mso-data-placement:same-cell;}--></style>M. Tech in VLSI Design in 2009 from NIRMA University, CPI = 8.17 / 10.
<style type="text/css"><!--td {border: 1px solid #ccc;}br {mso-data-placement:same-cell;}--></style>1. Assistant Professor - Indus University, from 07/02/2011 to 30/05/2017
2. Junior Telecom Operator - BSNL, from 10/05/2010 to 02/02/2011
3. Lecturer - LDRP Institute of Technology and Research, from 27/07/2009 to 30/04/2010
<style type="text/css"><!--td {border: 1px solid #ccc;}br {mso-data-placement:same-cell;}--></style>Digital VLSI Design, VLSI Signal Processing, VHDL - Verilog Programming
<style type="text/css"><!--td {border: 1px solid #ccc;}br {mso-data-placement:same-cell;}--></style>UG level
1. Digital Electronics
2. Signals and Systems
3. Digital Signal Processing
4. VLSI Technology
5. Embedded Systems
6. Testing and Verification
7. Circuits and Networks
8. Control Theory
9. Communication System
10. Analog Electronics
11. Design Engineering
<style type="text/css"><!--td {border: 1px solid #ccc;}br {mso-data-placement:same-cell;}--></style>Trainings taken
1. VC training on "Spectrum of Electronics and Communication Engineering and Emerging Technologies"
<style type="text/css"><!--td {border: 1px solid #ccc;}br {mso-data-placement:same-cell;}--></style>Institute/Head Office/University level additional portfolio (chronological order)
1. Job Placement
2. Alumni
3. Gate Club
4. Scholarship
5. Miscellaneous
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<style type="text/css"><!--td {border: 1px solid #ccc;}br {mso-data-placement:same-cell;}--></style>Expert lecture delivered on "Introduction to Hardware Description Language" at VC training of "Spectrum of Electronics and Communication Engineering and Emerging Technologies" at VGEC - Chandkheda on 17/04/2018
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